UT54LVDS032LV LVDS Quad Receiver

Estimated 8 week lead time for prototypes; 10 week for HiRel

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Minimum Purchase:
5 units
Maximum Purchase:
250 units

The UT54LVDS032LV Quad Receiver is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400.0 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The UT54LVDS032LV accepts low voltage (340mV) differential input signals and translates them to 3V CMOS output levels. The receiver supports a three-state function that may be used to multiplex outputs. The receiver also supports OPEN, shorted and terminated (100 Ω) input fail-safe. Receiver output will be HIGH for all fail-safe conditions.

The UT54LVDS032LV and companion quad line driver UT54LVDS031LV provides new alternatives to high power pseudo-ECL devices for high speed point-to-point interface applications. All pins have Cold Spare buffers. These buffers will be high impedance when VDD is tied to VSS.



  • Point-to-point serial LVDS links over PCB traces or cables at data rates up to 400 Mbps per link
  • Payload Intra-Box or Box-to-Box serial communication links at up to 10m of cable length


  • 400.0 Mbps (200 MHz) switching rates
  • +340mV differential signaling
  • 3.3 V power supply
  • TTL compatible outputs
  • Cold spare all pins
  • Ultra low power CMOS technology
  • 1.9ns maximum propagation delay
  • 200ps maximum differential skew
  • Operational environment; total dose irradiation testing to MILSTD-883 Method 1019
    • Total-dose: 300 krad(Si) and 1Mrad(Si)
    • Latchup immune (LET > 100 MeV-cm2/mg)
  • Packaging options:
    • 16-lead flatpack (0.7 grams)
  • Standard Microcircuit Drawing 5962-98652
    • QML Q and V compliant part
  • Compatible with ANSI/TIA/EIA-644 Standard
9A515.e.1 or 9A515.e.2

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