UT8MR8M8 64 Megabit Non-Volatile MRAM


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Minimum Purchase:
5 units
Maximum Purchase:
250 units

The 64 Megabit Non-Volatile magnetoresistive random access memory (MRAM) is a highperformance memory multichip module (MCM) compatible with traditional asynchronous SRAM operations, organized as either four 2M words by 8 bits or one 8M words by 8 bits. The MRAM is equipped with five chip enables (/En), a single write enable (/W), and a single output enable (/G) pins, allowing for significant system design flexibility without bus contention. Data is non-volatile for > 20 years at temperature and data is automatically protected against power loss by a low voltage write inhibit.  The 64Mb MRAM is designed specifically for operation in HiREL environments. As shown in Table 4, the magneto-resistive bit cells are immune to Single Event Effects (SEE). To guard against transient effects, an Error Correction Code (ECC) is included within the device. ECC check bits are generated and stored within the MRAM array during writes. The MBE pin identifies that ECC logic has detected two bit errors during the current read cycle.


 Single 3.3-V power supply
 Fast 50ns read/write access time
 Functionally compatible with traditional asynchronous SRAMs
 Equal address and chip-enable access times
 HiRel temperature range (-40oC to +105oC)
 Automatic data protection with low-voltage inhibit circuitry to prevent writes on power loss
 CMOS and TTL compatible
 Data non-volatile for > 20 years (-40oC to +105oC)
 Read/Write endurance: Unlimited for 20 years (-40oC to +105oC)
 64-pin ceramic flatpack package (21.99 grams)
 Operational environment:
- Total dose: 1 Mrad(Si)
- SEL Immune: 112 MeV-cm2/mg @125oC
- SEU Immune: Memory Cell 112 MeV-cm2/mg @25oC
 Standard Microelectronics Drawing (SMD) - 5962-13207
- QML Q, Q+, and V (V pending contact factory)


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